This invention relates to circuitry for protecting a transistor against excessive transient voltages developed across the transistor such as when the transistor drives an inductor.
It is known to use an insulated-gate field effect transistor (IGFET) power transistor to drive an inductive load. As shown in FIG. 1, a metal-oxide-semiconductor (MOS) power switching transistor N1 has its conduction path connected between ground terminal 15 and a node 17. An inductor L1 connected in series with a resistance Rs is connected between node 17 and a power terminal 19 to which is applied a source of operating potential of VCC volts. The resistor Rs shown connected in series with inductor L1 may be a discrete current limiting resistor, or the inherent resistance of the inductor, or may represent a combination of both. When the transistor N1 is turned-on the current through the inductor increases with time, and when N1 is on for a period of time which exceeds the inductive-resistance time constant (T=L1/Rs), the current through the inductor L1 approaches a value of IMAX=VCC/Rs. When transistor N1 is turned-off, after being turned-on for any significant period, the electromotive force of the inductor attempts to maintain the current flow by generating a voltage which results in what is known in the art and referred to herein as an "inductive kick". The value of the voltage generated across the inductor is equal to Ldi/dt and has a polarity to raise node 17 above the positive power supply, where L is the inductance of the inductor (coil) and di/dt is the time rate of change of the decay current. The amplitude of the inductive kick voltage may range up to several hundred, and even thousands of volts. This high voltage kick at node 17 may exceed the breakdown voltage (BVDS) of the transistor N1 causing the transistor to be damaged and/or destroyed and also causing damage to associated circuitry. Therefore, the voltage at the drain of N1 must be limited to avoid exceeding the break down voltage of N1 and the generation of high amplitude transient voltages.
A known method for limiting the voltage due to an "inductive kick" includes the use of a "load dumping" diode such as diode D1 connected at its anode to node 17 and at its cathode to terminal 19. So connected, the voltage at node 17 can rise to one forward diode drop (VF) above VCC. The diode D1 functions to limit the voltage kick at node 17 to VF+VCC and the voltage across the inductor-resistor combination is limited to VF volts (typically 0.8 volts). Limiting the voltage across the inductor-resistor to such a relatively small value (i.e., VF volts) effectively limits the inductive kick, but as a result it takes a relatively long time to discharge the energy stored in the inductor. The ideal discharge (or decay) time (TD) of an inductor with zero resistance is equal to L(IND)/VL; where L is the inductance of the coil, IND is the-current in the inductor at the time N1 is turned-off, and VL is the voltage drop across the inductor. Thus the discharge time is inversely proportional to the voltage across the inductor. Also, the diode must be made very large to handle the maximum inductive current which may equal VCC/Rs.
To avoid the problems present when using a single diode, it is known to use a Zener diode (Z1) and a diode (D2) serially connected between the drain and gate of power transistor N1 as shown in FIG. 2. Referring to FIG. 2, it should be noted that, as in the circuit of FIG. 1, after N1 is turned-on for some time a substantial current flows through L1 and via the conduction path of N1 to ground. Typically N1 will be turned-off by the turn-on of transistor NA in inverter I1 which tends to clamp the gate of N1 to ground. When N1 is turned-off at a time t1, the voltage at node 17 tends to rise sharply. When the voltage (V17) at node 17 rises above the forward drop (VFD2) of D2 and the Zener voltage (VZ) of Z1, conduction takes place from node 17 via D2 and Z1 into the gate of N1. As a result, V17 will be held at a value equal to the VFD2 of D2 plus the VZ of Z1 above the voltage (V13) at the output 13 of inverter I1. Typically, V13 will be maintained a little above the threshold voltage (VTH) of N1, which is within a volt or so of ground potential. Thus by selecting VZ+VFD2+VTH to be less than the breakdown voltage of N1, the voltage at node 17 is prevented from exceeding the breakdown of N1.
Limiting or clamping the voltage at node 17 using Zener diode feedback as shown in FIG. 2 is advantageous in that the Zener diode voltage can be selected to control V17 to be less than the drain-to-source and drain-to-gate breakdown voltage of N1. Furthermore, it provides a larger amplitude turn-off voltage across the inductor which results in the current in the inductor being discharged much faster. Furthermore, most of the inductive load dump current flows through power transistor N1, whereby the Zener diode can be made to be a low current structure.
However, a problem exists in that it is not always possible to make a zener diode with the required zener breakdown voltage and/or needed characteristics. Moreover, in some processes it is not even possible to make a zener diode within the same structure as the MOS power transistor.
To overcome this problem, an object of the present invention is to use a "clamping" transistor to clamp any transient voltage produced at the drain of the power switching transistor instead of a zener or diode clamp.